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Interrupts. ELEC 330 Digital Systems Engineering Dr. Ron Hayne Images Courtesy of Ramesh Gaonkar and Delmar Learning. Basic Concepts of Interrupts. An interrupt is a communication process A device Requests the MPU to stop processing Internal or external The MPU
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Interrupts ELEC 330 Digital Systems Engineering Dr. Ron Hayne Images Courtesy of Ramesh Gaonkar and Delmar Learning
Basic Concepts of Interrupts • An interrupt is a communication process • A device • Requests the MPU to stop processing • Internal or external • The MPU • Acknowledges the request • Attends to the request • Goes back to processing where it was interrupted 330_10
Types of Interrupts 330_10
MPU Response to Interrupts • When interrupts are enabled • MPU checks interrupt request flag at the end of each instruction • If interrupt request is present, the MPU • Resets the interrupt flag • Saves the return address on the stack • MPU redirected to appropriate memory location • Interrupt vectors • Interrupt service routine (ISR) meets request • MPU returns to where it was interrupted • Specific return instruction 330_10
PIC18 Interrupts • PIC18 Microcontroller family • Has multiple sources that can send interrupt requests • Does not have any non-maskable or software interrupts • All interrupts are maskable hardware • Has a priority scheme divided into two groups • High priority and low priority • Uses many Special Function Registers (SFRs) to implement the interrupt process 330_10
PIC18 Interrupt Sources • External sources • Three pins of PORTB • RB0/INTO, RB1/INT1,and RB2/INT2 • Can be used to connect external interrupting sources • Keypads or switches • PORTB Interrupt (RBI) • Change in logic levels of pins RB4-RB7 • Internal peripheral sources • Examples • Timers • A/D Converter • Serial I/O 330_10
PIC18 Interrupt Sources • Special Function Registers (SFRs) • RCON • Priority Enable • INTCON • External interrupt sources • IPR, PIE, and PIR • Internal peripheral interrupts • Valid interrupt • Interrupt request bit (flag) • Interrupt enable bit • Priority bit 330_10
Interrupt Priority • Interrupt priorities • High-priority interrupt vector 000008H • Low-priority interrupt vector 000018H • A high-priority interrupt can interrupt a low-priority interrupt in progress. • Interrupt priority enable • Bit7 (IPEN) in RCON register RCON 330_10
External Interrupts • INTCON Register • INTCON2 Register • INTCON3 Register 330_10
Interrupt Service Routine (ISR) • Similar to a subroutine • Attends to the request of an interrupting source • Clears the interrupt flag • Should save register contents that may be affected by the code in the ISR • Must be terminated with the instruction RETFIE • When an interrupt occurs, the MPU: • Completes the instruction being executed • Disables global interrupt enable • Places the return address on the stack 330_10
Interrupt Service Routine (ISR) • High-priority interrupts • The contents of W, STATUS, and BSR registers are automatically saved into respective shadow registers. • Low-priority interrupts • These registers must be saved as a part of the ISR • If they are affected • RETFIE [s] ;Return from interrupt • RETFIE FAST ;FAST equivalent to s = 1 • If s =1: MPU also retrieves the contents of W, BSR, and STATUS registers 330_10
Internal Interrupts • PIC18 MCU internal interrupt sources • Timers • A/D converter • Serial I/O • Each interrupt has three bits • Interrupt priority bit • Interrupt enable bit • Interrupt request bit (flag) • Interrupt registers • IPR: Interrupt Priority Register • PIE: Peripheral Interrupt Enable • PIR: Peripheral Interrupt Request (Flags) 330_10
Interrupt Registers • IPR1 • PIE1 • PIR1 330_10
Multiple Interrupt Sources • All interrupt requests are directed to one of two memory locations (interrupt vectors) • 000008H (high-priority) • 000018H (low-priority) • When there are multiple requests • The interrupt source must be identified by checking the interrupt flags 330_10
Illustration • Problem Statement • INT1 set up as a high-priority interrupt • Timer1 and Timer2 set up as low-priority • Identify the interrupt sources • Execute the appropriate interrupt service routines 330_09
Illustration 330_04
Illustration 330_04
Illustration 330_04
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